1. Technical Field
The present invention relates to a method of manufacturing a semiconductor device.
2. Related Art
With further advancement in integration level and higher operation speed of devices, a demand has arisen in the lithographic process, in particular in a step of forming the gate pattern, with respect to formation of fine gate patterns far shorter than the wavelength of exposure light. With recent trends in higher integration levels, system LSIs tend to include more kinds of circuit patterns therein. If a mask (reticle) contains various circuit patterns, adoption of optical conditions for light exposure optimized to any one of the various patterns results in resolution failures in other patterns, due to optical characteristics degraded by proximity effects and so forth. The situation may induce abnormal geometrical failures such as increase of constriction, increase of dimensional variation, and interconnects line shorts.
There has been a well-known technique, OPC (optical proximity correction), modifying a mask pattern in order to obtain the designed pattern shape on a wafer, by taking such proximity effect into consideration. Increased complexity in the circuit pattern has, however, raised a problem of complicating the OPC, and of consequently increasing the operation load. Complicated circuit pattern has degraded the accuracy of correction, and resulting in the electrical characteristics of fabricated devices.
A technique using the Levenson-type phase shift mask (PSM) has been known as a method of forming fine patterns. The Levenson-type PSM is particularly excellent in effects of improving optical contrast and resolution performance, and is supposed to be an expectant technique of forming fine patterns equal to or smaller than half of the wavelength of exposure light. Phase shifters so as to change phase of transmitted light (through the phase shifters) by π are disposed on the Levenson-type PSM. The light intensity becomes zero at the boundary between phase-shifter area and non-shifter area by complete canceling of positive-negative (0−π) photo-electric fields based on optical interference.
Patent Document 1 (Japanese Laid-Open Patent Publication No. 2005-86119) describes a method of forming a fine pattern, aimed at fabricating a photomask having a transmission portion and intercepting portion for light exposure onto a resist, the method including a step of extracting regions where line portions and contact portions in a pattern of a photomask pattern are adjacent to each other, and fabricating a first mask composed of the line portions and a second mask composed of the contact portions; a step of illuminating the resist through a first mask under a first illumination condition; and a step of illuminating the resist through a second mask under a second illumination condition. According to the description, dimensional errors of the finished resist pattern ascribable to the optical proximity effect can be reduced.
Patent Document 2 (Japanese Laid-Open Patent Publication No. 2000-227652) describes a method of forming a pattern using a phase shift mask, capable of preventing narrow-pitched pattern from being thinned.
[Patent Document 1] Japanese Laid-Open Patent Publication No. 2005-86119
[Patent Document 2] Japanese Laid-Open Patent Publication No. 2000-227652